RESURF technique is a well-known technique for increasing the breakdown voltage of a semiconductor device.
FIG. 1 shows a Lateral MOSFET device where a Field Oxide (FOX) isolation structure 11 is used to define a RESURF MOSFET as a prior art. The drain 12 comprises a drain contact region 120 and a drift region 121. The drift region 121 is between the channel 140 and the drain contact region 120. The FOX structure 11 reduces the surface field of the drift region 121 when a high gate voltage is applied, thus higher breakdown voltage is achieved. The RESURF breakdown voltage is proportional to the RESURF length in general. Thus power devices with high breakdown voltage always require long RESURF length and the cell pitch is big. It is not adapted to the miniaturization trend of the electronics devices. Moreover, the conduction resistance RDSON is not low due to the long drift region 121. It is desired that the RESURF length is long and the cell pitch of the drift region is small without adding to much cost.
Also, as one of the power device's key parameters, the charge density (q/cm2) where the RESURF action occurs is related to the RESURF depth. The deeper the RESURF depth, the higher charge density is for a given doping profile. Therefore, the depth d1 of the drift region 121 is also an important parameter for the performance of the MOSFET device.
In the current approaches, the charge density is optimized by dose control and/or thermal recipes control. The specific thermal recipes control will affect the performance of other devices during the integration process. And the specific dose control or RESURF depth control requires additional mask which greatly adds to the cost. And meanwhile, the research development time for the conventional approaches is relatively long.